Configurable Processors

In this article, Steven Leibson from Tensilica shows some tricks used to hardware-optimize DSP computations with the help of SoC, FGPA, or ASIC. He emphasizes that the use of hardware acceleration is crucial for many DSP applications. Adding special instruction extensions supported by configurable hardware has advantage over assembly-code optimization of a critical path of an algorithm.

There are a few examples (MPEG4, Viterbi and FFT).

http://www.dspdesignline.com/howto/showArticle.jhtml?articleId=193302782&pgno=1